Wednesday, April 2, 2008

Instruction Set

Arithmetic Instructions
The menu of arithmetic instructions is listed in Table 4.1 The table indicates the addressing modes that can be used with each instruction to access the operand.
For example, the ADD A, instruction can be written as:

ADD a, 7FH (direct addressing)
ADD A, @R0 (indirect addressing)
ADD a, R7 (register addressing)
ADD A, #127 (immediate constant)

The MUL AB instruction multiplies the Accumulator by the data in the B register and puts the 16-bit product into the concatenated B and Accumulator registers.
The DIV AB instruction divides the Accumulator by the data in the B register and leaves the 8-bit quotient in the Accumulator, and the 8-bit remainder in the B register.
Table 4.1. MCS-51 Arithmetic Instruction

Logical Instructions
Table 4.2 shows the list of 80C51 logical instructions. The instructions that perform Boolean operations (AND, OR, Exclusive OR, NOT) on bytes perform the operation on a bit-by-bit basis. That is, if the Accumulator contains 00110101B and byte contains 01010011B, then:
Table 4.2. MCS-51 Logical Instructions

Data Transfer
Internal RAM
Table 4.3 shows the menu of instructions that are available for moving data around within the internal memory spaces, and the addressing modes that can be used with each one. With a 12MHz clock, all of these instructions execute in either 1 or 2ms. The MOV , instruction allows data to be transferred between any two internal RAM or SFR locations without going through the Accumulator. Remember, the Upper 128 bytes of data RAM can be accessed only by indirect addressing, and SFR space only by direct addressing.The Data Transfer instructions include a 16-bit MOV that can be used to initialize the Data Pointer (DPTR) for look-up tables in Program Memory, or for 16-bit external Data Memory accesses.

Table 4.3. MCS-51 Data Transfer Instruction

Example:
a.
Org 0h
Start:Mov A,#1 ; put 1 into the accumulator
ADD A,#2 ; add the constant 2 to Accumulator (1+2)
Mov 78h,#3 ; put 3 into internal RAM 78h
ADD A, 78h ; add Acc and RAM 78h content
Mov R0, #79h; put 79 into R0
Mov @R0, #4 ; put 4 into RAM 79h
ADD A,@R0 ; add Acc and RAM 79h content
Mov R5, #5 ; put 5 into R5
ADD A,R5 ; add Acc and R5
end

b.
Org 0h
Start:Mov 78h,#34h ; [ 78h ] = 34h
Mov 79h,#12h ; [ 79h ] =12h
Mov 7Ah,#0EFh; [ 7Ah ] = EFh
Mov 7Bh,#12h ; [ 7Bh ] = 12h
Mov A,78h ; A = [ 78h ]
Add A,7Ah ; A = A + [ 78h ]
Mov 78h,A ; [ 78h ] = A
Mov A,79h ; A = [ 79h ]
ADDC A,7Bh ; A = A + [ 7Bh ] + C
Mov 79h,A ; [ 79h ] = A
end

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